1. Field of the Invention
The present invention relates to a power consumption calculating apparatus and method of the same using a logical simulation. More specifically, it relates to a power consumption calculating apparatus and method of calculating the power consumption for calculating the power consumption consumed in a CMOS (Complementary Metal Oxide Semiconductor) circuit in accordance with toggle information obtained from the logical simulation.
2. Description of the Related Art
Before manufacturing a semiconductor integrated circuit on a manufacturing line, estimation of power consumption consumed in the integrated circuit is carried out with use of a logical simulation to ensure that the power consumption should be within a design value. Such estimation of power consumption is known in the field of circuit design produced by CAD (Computer Aided Design) system when producing an integrated circuit, which has been proposed by a Japanese Patent Application Laid-open No. Hei5-128192.
In such case of the gazette, power consumption information is previously provided for each of the cells constituting an integrated circuit so that it corresponds to combination of input signals in relation to the integrated circuit. A logical simulation is applied to the combination of input signals to thereby obtain state-transited information of the signals. The power consumption corresponding to the state-transited information is then calculated with reference to the previously provided power consumption information.
In this case, the state-transited information means that a signal level on an input pin emerges simply on what its value becomes at a certain time. In the power consumption calculating method described in the gazette, the power consumption is obtained from the previously provided power consumption information at every certain period of time. This power consumption is then added up to as a total value when adding the power consumption for each of the cells in accordance with the state transition of input signals.
However, the variation of input signals inputted to the cells is no consideration how the signals are altered to one after another at every period of time. Therefore, the power consumption for each of the cells should be constant while the state transition of input signals is made continuous for a certain period of time.
In consideration of the power consumption consumed in CMOS circuit, FIG. 10(a) is a circuit diagram for explaining the power consumption in a CMOS circuit which constitutes an inverter having a P-channel transistor P and an N-channel transistor N. The transistors P and N produce a state-transited information such as On and Off states in response to a high (hereinafter, abbreviated to H) level and low (hereinafter, abbreviated to L) level emerged on an input, as shown in FIG. 10(b).
As also shown in FIG. 10(c), an output of the inverter is altered from the L to H state when the input state is altered from the H to L state. At this time, with an altered current I1 altered into an output-connected load capacitor C1 from a power source VDD, the power consumption is produced in the transistor P due to an internal resistance. After terminating the alteration into the load capacitor C1, the power consumption can be neglected since the current flown from the power source VDD is extremely small.
While the input is altered from the L to H state, the output is altered to the H to L state. At this time, a current is not flown from the power source VDD, but, with a discharged current I2 discharged from load capacitor C1 to a ground, the power consumption is produced in transistor N due to internal resistance. After terminating the discharge of load capacitor C1, the power consumption can also be neglected due to a small current flown from the power source VDD.
As described above, in the case where an integrated circuit is made up of CMOS circuit, the value of power consumption is not constant while the state of input signal is made continued. That is, the power consumption is mostly emerged at altering the state transition of the input, but it is extremely small in steady state.
Thus, the power consumption consumed in the CMOS circuit is proportional to frequency for the state transition of input (or output) or its operating frequency. The power consumption calculating method by the gazette may therefore result in a case where the power consumption is not dependent on the frequency in principle since it is constant while the state transition of input signal is made continued.
It is therefore an object of the present invention to provide a power consumption calculating apparatus and method of the same capable of calculating the power consumption consumed in an integrated circuit made up of CMOS device with use of a logical simulation.
According to a first aspect of the present invention, there is provided a power consumption calculating apparatus, including: a power consumption library unit storing a power consumption consumed in at least one logical primitive constituting a logic circuit at a time of transiting a state of the logical primitive in correspondence with an identifier provided for a combination of input signal states emerged on the logical primitive and a load capacitance for the logical primitive; a logic circuit information storing unit storing information of a structure for the logical primitive and a connection state between the logical primitives in the logic circuit; a capacitance storing unit storing information for the load capacitance of the logical primitive estimated in response to the logic circuit information; an input signal type storing unit storing information of an input signal type in the logic circuit; a logical simulation unit carrying out a logical simulation with use of the logic circuit information and the input signal type information to determine state-transited information in the logical primitive with the identifier used; and a power consumption calculating unit collecting the identifier obtained from a result of the logical simulation for the logical primitive constituting the logic circuit, determining a power consumption for the logical primitive with reference to the power consumption library unit in response to the state-transited information of the identifier and the load capacitance information, and summing the power consumption for at least the one logical primitive to determine a total power consumption of the logic circuit.
The logic circuit may include a plurality of logical primitives.
The logical primitive may include a logic device made up of a CMOS circuit.
The load capacitance may be estimated from an output wiring capacitance of the logical primitive and an input terminal capacitance of logical primitives in succeeding stages.
The load capacitance may be estimated for arbitrary number of stages in a plurality of logical primitives.
The power consumption calculating unit may determine the power consumption for the state-transited information obtained from a result of the logical simulation, thereafter, may determine the power consumption for each time interval of an arbitrary time series different from a time series of the state-transited information in accordance with the result of the power consumption calculation.
The power consumption calculating apparatus may further include, a library unit determining the power consumption for at least one logical primitive at a time of transiting the input signals inputted to the logical primitive constituting a logic circuit to store the power consumption in correspondence with state transitions of the input signals; and a power consumption summing unit identifying the state transition of the input signal inputted to the logical primitive in accordance with a result of logical simulation in the logic circuit, reading out the power consumption from the library means, and determining the power consumption for the logical primitive to sum up the determined power consumption for the logic circuit.
According to a second aspect of the present invention, there is provided a power consumption calculating method, including the steps of: (a) providing a power consumption library unit for storing a power consumption consumed in at least one logical primitive constituting a logic circuit at a time of transiting a state of the logical primitive in correspondence with an identifier provided for a combination of input signal states emerged on the logical primitive and a load capacitance for the logical primitive; (b) determining previously load capacitance information for the logical primitive estimated from information of a structure of the logical primitive and of connection state of the logical primitive in the logic circuit; (c) carrying out a logical simulation with use of the logic circuit information and the input signal type information to determine state-transited information in the logical primitive with the identifier used; (d) collecting the identifier obtained from a result of the logical simulation for the logical primitive constituting the logic circuit; (e) determining a power consumption for the logical primitive with reference to the power consumption library unit in response to the state-transited information of the identifier and the load capacitance information, and (f) summing the power consumption for at least the one logical primitive to determine a total power consumption of the logic circuit.
The power consumption calculating method may further include the steps of: (a1) determining previously a power consumption for at least one logical primitive at a time of transiting input signals inputted to the logical primitive constituting a logic circuit to store the power consumption in a library in correspondence with the state transition of the input signals; (b1) identifying the state transition of the input signal inputted to the logical primitive in accordance with a result of a logical simulation in the logic circuit; and (c1) reading out the power consumption corresponding to the state transition from the library, determining the power consumption for the logical primitive, and determining the power consumption of the logic circuit in accordance with the power consumption determined for at least the one logical primitive.
According to the constitution and method of power consumption calculation described above, the power consumption consumed in an integrated circuit made up of CMOS device can be determined by the logical simulation.